1. Field of the Invention
This invention relates to semiconductors and more particularly to split-gate MOSFET devices such as flash memories.
2. Description of Related Art
There are several known ways of making split-gate structures which require critical alignment masking steps with all the known problems attendant therewith such as misalignment during the masking step, or etching of one side of a (polysilicon (poly)) spacer.
U.S. Pat. No. 4,639,893 of Eitan for "Self-Aligned Split Gate EPROM" shows photoresist on one side of a floating polysilicon 1 gate. The total channel length of a split-gate manufactured in this manner depends upon the alignment of the photoresist mask on a polysilicon 1 gate.
U.S. Pat. No. 5,063,172 of Manley for "Manufacture of a Split Gate EPROM Cell Using Polysilicon Spacers" shows a split-gate structure with a conductive polysilicon spacer. Ion implantation is performed after photoresist has been used to etch away the spacer on the source side.
There is a technology called large tilted angle ion implantation which allows ion implantation to be preformed at angles other than the vertical, that is 0.degree.. This technique has been used to make various MOSFET LDD integrated circuit devices. The U.S. Pat. No. 4,771,012 to Yabu et al; U.S. Pat. No. 5,073,514 to Ito et al; U.S. Pat. No. 5,158,901 to Koss et al and U.S. Pat. No. 5,147,811 all show the sue of tilted angle ion implantation to make integrated circuit devices. The publication "1/4 .mu.m LATID (LArge-Tilted-angle Implanted Drain) TECHNOLOGY" by T. Hori, published in IEDM 89 pages 777/780 and "Graded-Junction Gage/N-Overlapped LDD MOSFET Structures for High Hot-Carrier Reliability" by U. Okumura et al published in the IEEE Transactions on Electron Devices, Vol. 38, No. 12, Dec. 1991 (pages 2647-2656) show further use of tilted angle ion implantation. These references all use single tilted angle ion implantation to improved device performance.
An object of this invention is a process which avoids any critical masking steps needed to fabricate a split-gate, non-volatile memory.
In accordance with this invention a semiconductor is formed using a Large-Angle-Implant (LAI) process to generate an off-set region for split-gate formation.